Submissions from github.com/chipsalliance

		T1: A RISC-V Vector processor implementation (github.com/chipsalliance)
		117 points by namanyayg 11 months ago \| past \| 19 comments
		Chisel: A Modern Hardware Design Language (github.com/chipsalliance)
		156 points by nairboon on Dec 27, 2023 \| past \| 76 comments
		Firrtl – Flexible Intermediate Representation for RTL (github.com/chipsalliance)
		2 points by peter_d_sherman on July 15, 2023 \| past \| 1 comment
		Chisel 3: A Modern Hardware Design Language (github.com/chipsalliance)
		3 points by notamy on June 5, 2021 \| past
		Western Digital SweRV RISC-V Core (github.com/chipsalliance)
		153 points by ch_sm on Nov 5, 2020 \| past \| 59 comments