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The L stands for longevity.

Which reminds me that the R, of course, stands for Recyclability.

Not sure if this satisfies your requirements, but I've gotten Claude Code to run commands in tmux and view their output (including debugging my NeoVim config), so I think that a TUI is at least accessible, even though it would likely bloat the context window far more than a simple CLI.

Yeah, this is my main way of using Claude Code for anything complex – a REPL or bash window in tmux, and with Claude running commands there. That lets me easily browse through anything that's happened in a UI I'm used to, or manually intervene if needed.

That's pretty nice! It's just the context window problem, yes, but the tmux tip is pretty good nonetheless.

Or, they have freed up time for more useful endeavours, that may otherwise have spent on drudgery.

I don't discount the value of blood, sweat and tears spent on debugging those hard issues, and the lessons learned from doing so, but there is a certain point where it's OK to take a pass and just let the robots figure it out.


Just wish they weren't so insanely expensive...

The bigger the chip, the worse the yield.

Cerebras has effectively 100% yield on these chips. They have an internal structure made by just repeating the same small modular units over and over again. This means they can just fuse off the broken bits without affecting overall function. It's not like it is with a CPU.

I think what you’re saying is that every wafer is usable, but won’t have the same performance characteristics, depending on how many bits are broken.

Doesn’t that just bucket wafers based on performance? Which effectively gives a yield to each bucket.


I suggest to read their website, they explain pretty well how they manage good yield. Though I’m not an expert in this field. I does make sense and I would be surprised if they were caught lying.

This comment doesn't make sense.

One wafer will turn into multiple chips.

Defects are best measured on a per-wafer basis, not per-chip. So if if your chips are huge and you can only put 4 chips on a wafer, 1 defect can cut your yield by 25%. If they're smaller and you fit 100 chips on a wafer, then 1 defect on the wafer is only cutting yield by 1%. Of course, there's more to this when you start reading about "binning", fusing off cores, etc.

There's plenty of information out there about how CPU manufacturing works, why defects happen, and how they're handled. Suffice to say, the comment makes perfect sense.


That's why you typically fuse off defective sub-units and just have a slightly slower chip. GPU and CPU manufacturers have done this for at least 15 years now, that I'm aware of.

Sure it does. If it’s many small dies on a wafer, then imperfections don’t ruin the entire batch; you just bin those components. If the entire wafer is a single die, you have much less tolerance for errors.

Although, IIUC, Cerebras expects some amount of imperfection and can adjust the hardware (or maybe the software) to avoid those components after they're detected. https://www.cerebras.ai/blog/100x-defect-tolerance-how-cereb...

You can just do dynamic binning.

Bigger chip = more surface area = higher chance for somewhere in the chip to have a manufacturing defect

Yields on silicon are great, but not perfect


Does that mean smaller chips are made from smaller wafers?

They can be made from large wafers. A defect typically breaks whatever chip it's on, so one defect on a large wafer filled with many small chips will still just break one chip of the many on the wafer. If your chips are bigger, one defect still takes out a chip, but now you've lost more of the wafer area because the chip is bigger. So you get a super-linear scaling of loss from defects as the chips get bigger.

With careful design, you can tolerate some defects. A multi-core CPU might have the ability to disable a core that's affected by a defect, and then it can be sold as a different SKU with a lower core count. Cerebras uses an extreme version of this, where the wafer is divided up into about a million cores, and a routing system that can bypass defective cores.

They have a nice article about it here: https://www.cerebras.ai/blog/100x-defect-tolerance-how-cereb...


Nope. They use the same size wafers and then just put more chips on a wafer.

So, does a wafer with a huge chip has more defects per area than a wafer with 100s of small chips?

There’s an expected amount of defects per wafer. If a chip has a defect, then it is lost (simplification). A wafer with 100 chips may lose 10 to defects, giving a yield of 90%. The same wafer but with 1000 smaller chips would still have lost only 10 of them, giving 99% yield.

As another comment referenced in this thread states, Cerebras seems to have solved by making their big chip a lot of much smaller cores that can be disposed of if they have errors.

Indeed, the original comment you replied to actually made no sense in this case. But there seemed to be some confusion in the thread, so I tried to clear that up. I hope I’ll get to talk with one of the cerebras engineers one day, that chip is really one of a kind.

Yes, amazing tech. You should join their Discord, it's pretty active these days!

You say this with such confidence and then ask if smaller chips require smaller wafers.

AI sycophancy goes both ways.

I've had LLMs get pretty uppity when I've used a less-than-polite tone. And those ones couldn't make nasty blog posts about me.


Where's the accountability here? Good luck going after an LLM for writing defamatory blog posts.

If you wanted to make people agree that anonymity on the internet is no longer a right people should enjoy this sort of thing is exactly the way to go about it.


There is no accountability (for now, at least)... But if you want it to delete its own blog post defamining you, you'll evidently have better luck asking nicely than by being aggressive. (Which matches my experience with LLMs. As a rule, saccharine politeness works well on them.)

I'm having trouble imagining a way to describe a post-Patriot Act USA as a free state.

That mission's not very hard... All you have to do is follow the damn train, CJ!

It has to be. The timing is just too close.


That's actually pretty funny. They're patting it on the back for using, in all likelihood, some significant portions of code that they actually wrote, which was stolen from them without attribution so that it could be used as part of a very expensive parlour trick.

Did you do diffs to confirm the code as stolen or are you just speculating.

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