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I think in many ways this could be considered a feature and not a problem. Why does it matter if someone butts in front of you? The passengers in the car can relax and let the computer handle the task. Yes it's important to avoid deadlock while merging during congestion but aggressive drivers will always try to butt in front of likely looking candidates, autonomous or not, and this usually doesn't stop progress of the line in general, just maybe frustrates the non-driver?


The issue then is, again, humans- the rider of an autonomous car will feel slighted and helpless seeing the cars around them take advantage of their nice and polite driver-AI, and this will make owning driverless cars less appealing to a wide swath of the customer base.

You and I might still enjoy passively riding an altruistic vehicle, but an astonishing amount of the public id is absorbed in these sort of anonymous dominance games.


I thought the point of "autonomy" was being able to ignore the whole mess? If I'm constantly worried about how the car is driving, I might as well be a child with my mother driving. How would that be less silly than worrying about the performance of e.g. train engineers and airline pilots?


I love this kind of discussion -- the danger of initial hiccups prejudicing people against the future potential of a tech.

If most cars are autonomous, then it seems pretty reasonable -- people will get used to them and I think we'll figure out standards of politeness. Like elevators: "Don't press all the elevator buttons, but it's okay to request your floor even though it slows down other peoples' trips."

But the tricky part is the transition period, where only a few cars are autonomous -- and I guess that's what this article is talking about. How can we help that transition?


We simply put up with the bullying. Mercedes chief is worried because his passengers are high social status individuals who will be very unhappy at being bullied despite driving powerful expensive cars that denote high status.


Yes exactly. The most expensive car is the one most likely to be self driven. I have no doubt people in my hometown will gladly cut them off at every opportunity. Lol.


One of the reasons to do this would precisely be to free up engineering talent that would otherwise have to be dedicated to developing specialized laptop logic board designs (and other specialized parts). If you can build a relatively flexible internal hardware platform that can handle laptop, tablet or phone use cases, then your production teams can focus on core problems for a specific product while borrowing whatever solutions they need from other teams. Apple already has similar chips and boards running iPads and iPhones, so why not consolidate laptops too?

For some evidence that this could be happening, look at ifixit's macbook teardown[0]. The logic board seems to be approaching the size of an iphone logic board [1]. Someone at Apple has to be asking a what-if question here when looking at this thing and thinking about how they could go all the way.

[0] https://www.ifixit.com/Teardown/Retina+MacBook+2016+Teardown... [1] http://www.cultofmac.com/315469/new-macbook-logic-board-is-o...


I've been following Apple and the rest of the industry since the mid 90's. Based on what I've seen I suspect that they already have built a handful of ARM Mac prototypes and maintain an ARM version of macOS, probably in a fairly serious way since the A7 shipped. macOS shares quite a bit of code with iOS and has been multi-architecture from the beginning. First bring-up was probably on actual iPhone or iPad dev hardware but they have the in-house fabrication capability to make machines that are visually the same as an existing model (probably 13" Air) with more or less the guts of an iPad. My guess is there are a small number of these floating around campus.

With those assumptions I still would bet against us seeing ARM Macs in the next couple years. There are a lot of advantages to keeping Macs single-architecture. Recent Intel CPUs are efficient enough that saving power there won't make a huge difference in user-available battery life (screen, DRAM, network, etc all use some too). Intel can price their CPUs aggressively enough to make cost not a major issue.

I do think it will eventually happen mainly because it will give them more control over their product line. Indicators of an upcoming shift will be if Intel screws up another generation of mobile CPU (it happened with Skylake, could happen again), Apple adds features like PCI-e for discrete GPU support (ok, they did in A9), and if Ax series performance starts to exceed corresponding Intel mobile parts by >50% (enough to compensate for the overhead of binary translation for legacy x86 apps).


> if Ax series performance starts to exceed corresponding Intel mobile parts by >50% (enough to compensate for the overhead of binary translation for legacy x86 apps).

Another milestone for an Ax laptop would be a good power efficiency story. If Apple can show an Ax based laptop with exceptional battery life under real working conditions that would be quite attractive to many people, even if translated programs experience a 50% drop in performance.

In addition to the Appstore bitcode stuff other comments mention, the Universal Binaries tools that were used for the mass powerpc->intel migration will also help to diminish the need for binary translation in many cases. UBs mean that you don't solely need to rely on Bitcode translation via the iOS/Appstore, either, so these fanciful Ax laptops could run all normal non-appstore apps quite easily.


>Apple adds features like PCI-e for discrete GPU support (ok, they did in A9), and if Ax series performance starts to exceed corresponding Intel mobile parts by >50% (enough to compensate for the overhead of binary translation for legacy x86 apps).

When it happens, it might not need binary translation.

http://lowlevelbits.org/bitcode-demystified/


If apps are delivered by the app store, the translation could happen there rather than at runtime.


Kinda seems like the compiler just shouldn't allocate r0 for inline assembly on PPC, since it's only valid in special circumstances. Hard to fault the ISA a lot since this is basically the compiler backend author(s) missing a corner case, which is quite easy to do considering the breadth of a compiler backend.


Yeah, that's not about the ISA, that's just Evidence That GCC's Inline ASM Functionality is a Mess #938292721

See also: http://free-electrons.com/blog/how-we-found-that-the-linux-n...

See also: http://robertoconcerto.blogspot.ca/2013/03/my-hardest-bug.ht...


Alternately it could be seen as evidence that PowerPC assembly syntax is a mess. For anyone who doesn't know, the way it works with typical PowerPC assemblers is that instructions take unadorned numbers for all arguments, and determine whether they refer to registers or immediates based on the instruction: "li 1, 2" sets R1 to the immediate 2 ("load immediate"), while "mr 1, 2" sets R1 to the value of R2 ("move register"). And then because people find bare numbers confusing, you have includes that do "#define r1 1" or equivalent for each register, so when writing assembly manually you can write "mr r1, r2". But because these are just dumb macros, nothing stops you from writing "li r1, r2" - the assembler will just macro expand r2 to 2 and treat it as an immediate!

Other architectures have the R prefix as an intrinsic part of the syntax, so if you write R2 in a slot where the instruction requires an immediate, you'll just get an error. If PowerPC did that, you'd still need to remember the right inline assembly constraint letter for GCC, but getting it wrong would 'just' result in an unpredictable compile error when the compiler decided to use r0, not silent misbehavior.


At least with GNU as you can use %r1, %r2 etc. as an "intrinsic part of the syntax". Which means you can't use a register name where an immediate is expected.

However that doesn't fix the gotcha with r0 being special, that is specified in the ISA. In fact it's that way precisely so you can load an immediate without needing a separate opcode.


Huh, never knew that... but I just tried it and GAS (the version Debian installed as powerpc-linux-gnu-as, at any rate) accepted "lwz %r0, %r5(%r0)". Snatching defeat from the jaws of victory...

It would still be a gotcha, but a pretty minor one if messing it up just resulted in an error. I suppose the approach taken by AArch64 and others is preferable, where one register is just completely reserved as constant 0 rather than only in some encodings.


I second that. We've had some issues with gcc's inline assembly support. To make matters worse the list of things that it does and doesn't support is very fuzzy.


What sort of things did you guys try to convince people not cut you out? It seems that the marketplace needs very compelling value-add (aside from discovery) in order to get people to not cut it out after discovery. Trying to be the marketplace for existing venues seems quite challenging as most have already figured out their their infrastructure (payment processing, customer support, insurance, reporting, etc).


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