The point is that almost all of the signatories considered themselves to be immune to a "real war" in their futures at the time they signed. E.g. basically all of the European signatories assumed that the end of the cold war and existence of NATO would ensure the end of any possible threat. Given that assumption, as obviously flawed as it was, signing on to a ban was cheap PR (literally cheap, too, because it meant they could divest those weapons and their delivery mechanisms to reduce defense expenditures).
> Given that assumption, as obviously flawed as it was, signing on to a ban was cheap PR (literally cheap, too, because it meant they could divest those weapons and their delivery mechanisms to reduce defense expenditures).
Doubly so, since they understood themselves to be backed up by a non-signatory (the US).
I think the story is a bit more complicated. Core succeeded precisely because Intel had both the low-power experience with Pentium-M and the high-power experience with Netburst. The P4 architecture told them a lot about what was and wasn't viable and at what complexity. When you look at the successor generations from Core, what you see are a lot of more complex P4-like features being re-added, but with the benefits of improved microarch and fab processes. Obviously we will never know, but I don't think you would get to Haswell or Skylake in the form they were without the learning experience of the P4.
In comparison, I think Arm is actually a very strong cautionary tale that focusing on power will not get you to performance. Arm processors remained pretty poor performance until designers from other CPU families entirely (PowerPC and Intel) took it on at Apple and basically dragged Arm to the performance level they are today.
> In comparison, I think Arm is actually a very strong cautionary tale that focusing on power will not get you to performance.
Hugely underappreciated. Someone involved fully understood that "you don't get to the moon by climbing progressively taller trees".
The other two times Arm had great performance were the StrongArm, when it was implemented by DEC people off the Alpha project, and the initial ones, which were quite esoteric and unusually suited to the situation of the late 80s.
If you look at the V-22 safety record in the context of the level of technical development, it is pretty good (e.g. compare to helicopters and aircraft from the 60s). The first production generation of a brand new type of vehicle is always going to be complicated, and virtually all of the V-22 mishaps come from the "new" components and procedures.
The fundamental tradeoff with tiltrotor platforms is that you trade significantly increased speed for significantly increased complexity. What that means is your battlefield survivability goes up when dealing with any opponent with meaningful air defenses, but at the cost of increasing your "resting" accident rate when most peacetime accidents are consequences of maintenance and/or procedural issues.
Because Sikorski can't make them work. Sure, they can take off and fly fast in a straight line, but they haven't been able to demonstrate sufficient maneuverability due to vibration problems in the rotor head. They are also very tall, prohibitively so for existing shipboard hangar, which would otherwise seem to be their advantage over tiltrotor platforms.
> The hardware is built around a stackable 10×10cm compute module with two ARM Cortex-A55 SBCs — one for ROS 2 navigation/EKF localisation, one dedicated to vision/YOLO inference — connected via a single ethernet cable.
I will preface this by saying that I have nothing against ARM per se, that my employer/team supported a good chunk of the work for making ROS 2 actually work on arm64, and that there is some good hardware out there.
I really don't understand why startups and research projects keep using weird ARM SBCs for their robots. The best of these SBCs is still vastly shittier in terms of software support and stability than any random Chinese Intel ADL-N box. The only reasons to use (weird) ARM SBCs in robots are that either (1) you are using a Jetson for Jetson things (i.e. Nvidia libraries), or (2) you have a product which requires serious cost optimization to be produced at a large scale. Otherwise you are just committing yourselves and your users/customers to a future of terrible-to-nonexistent support and adding significantly to the amount of work you need to bring up the new system and port existing tools to it.
> The only reasons to use ARM SBCs in robots are...
Obviously, anyone can have there own opinion on this.
I work in robotics, we are quite happy with our A53 and M4. Though, we use a SOM, not a SBC, if you feel like splitting hairs.
You probably aren't using some weird SOM, though. There is a bit of an unstated exception of "unless said SBC/SOM has specific hardware that is necessary/particularly valuable for your product/project". For example, if you need GMSL you are probably not going to be picking Intel, even though ADL-N and the bigger processors support MIPI, simply because no one else does and the documentation/support for it is basically nonexistent. Designs with closely-coupled A/M/R cores, or CPU/MCU/FPGA hybrids like Zynq would be others.
But generally projects which are choosing some random SBC aren't using any of these features, and are just suffering the pain/imposing it on their users for no good reason.
again, just an oppinion, but it feels really weird to hear you find "exception after exception", when the net result that you've ruled out more real world robotics projects on ARM than likely exist on x86 that you're suggesting should be the "norm".
you've ruled out the entire NXP ecosystem, the entire Nvidia Jetson ecosystem, the entire AMD/FPGA/Zynq ecosystem, even perfectly good options like beagle-board .... who else?
incidentally, you've also ruled out this project - as they are using an M7 microcontroller to meet their hard-real-time timing constraints...
The other poster had said nothing about microcontrollers, e.g. about the various MCU models based on Cortex-M cores.
Some things are best done with a microcontroller, and those are not suitable for being done with a general-purpose CPU either based on Intel/AMD or on Cortex-A cores. Actually there are many projects that mistakenly use something like a Raspberry Pi instead of a better and cheaper implementation with a microcontroller, e.g. one based on Cortex-M7 or its successor, Cortex-M85.
The other poster said that where you do not want a microcontroller, but you want to run a standard operating system, e.g. Linux, then the best choice is much more frequently a SBC with an Intel Alder Lake N or Twin Lake CPU, as these not only have a better performance per dollar than the ARM-based SBCs, but they also avoid any software problems and future maintainability problems.
Unfortunately, during the last few months the price of Intel-based SBCs has been affected by the fact that most of them do not have soldered memory but they use one SODIMM memory module. While you can buy an Intel Alder Lake N based SBC for $100, buying today a SODIMM for it may cost as much or more, depending on the amount of memory with which you are content.
The ARM SBCs that come with soldered LPDDR memory have initially been less affected by the price hikes, though now even for them the prices are rising.
I think you're missing my point entirely. If your project needs specific hardware, you have to use that specific hardware (the obvious examples of which would be Jetsons or Zynq/Zynq-like or something ASIL-D or something that tightly couples "A"/M/R cores together, or you are stuck using a SoC from Qualcomm for cell connectivity). There are a lot of projects that do fall into that category.
There are also a (much smaller) number of projects that will legitimately see the kind of scale of production that justifies aggressive cost optimization for the compute platform, either in terms of designing their own around a SoC or picking some SBC/SoM that they can get a good deal on, where the significant additional up-front engineering cost is outweighed by the production savings (and where the desire/need to keep a fixed platform means the often limited platform support from the vendor is less restrictive).
But a large number of robotics projects (basically everything in the research sphere) - this one very much included - just need "some computer" for general-purpose use. They are already separating realtime control onto a separate microcontroller board. For these projects, it is almost always committing a "premature pessimization" of picking some weird SBC. You are signing up for worse CPU and GPU performance, stability, and development future for very little reward.
There are a variety of x86 products with Coreboot support, if what you are looking for is firmware openness. If what you are looking for is PCB design openness, the options are much fewer, but at that point you are probably optimizing for an overly niche objective.
> Part of the point of this for me is to see what's possible with open hardware (down to chip level at least)
I appreciate the idea, but this is essentially saying "this project will prioritize a specific choice of one (core) piece of hardware to the detriment of everything else, users included". Approximately none of your potential users are going to benefit from the "openness" of the SBC versus that of a more broadly-supported platform (I say "openness" because the reality of SBCs is that actually finding a usefully performant one that is completely blob-free is almost impossible). Open hardware means very little if it isn't running an upstream kernel and userland.
The South-Korean Hardkernel ODROID H4 models are open hardware. There is no need to send one to you, as you can order one yourself from their on-line shop or from local shops.
You get their schematics/PCB documentation and their BIOS has features that are missing in most mini-PCs and laptops with Alder Lake N/Twin Lake, e.g. you can enable in-band ECC for the memory. You can choose various variants of the SBC and you can buy cheaply various accessories, e.g. several case variants and additional peripheral interfaces. Those ODROID H4 SBCs are also correctly designed for cooling inside a box like that used in this project, because the PCB is attached to a big heatsink and you can attach the heatsink directly to an aluminum wall from inside the box, ensuring good thermal contact with pads or grease, so that the electronics will be cooled well.
Most technical information can be found in their Korean site, but there is a UK distributor (though the prices appear greatly inflated here; so much that it might be cheaper to buy from South Korea, depending on shipping costs and applicable taxes):
Also the Chinese Radxa has a Raspberry Pi sized SBC with an Intel N100, which is open hardware, with complete schematics/PCB documentation (but unlike ODROID H4, which has excellent cooling and it can be used without a fan, it is unclear how easy is to cool the Radxa SBC).
Moreover, unlike for many Intel/AMD CPUs, which no longer have public documentation, for Alder Lake N Intel still provides public datasheets, which contain e.g. the thousands of control registers for the on-chip peripherals. Most ARM Cortex-A based CPUs are undocumented, with few exceptions like Rockchip RK3588 and the very expensive NVDIA Orin/Thor (or the obsolete Xavier). All Cortex-A based CPUs have secret boot loaders, so you can never be certain that your programs really run on bare metal, as the CPU vendor can implement the equivalent of the Intel System Management Mode, where the proprietary vendor firmware can take control from your own operating system whenever it wants.
There are somewhat more ARM-based SBCs than Intel-based SBCs that are open hardware, but there are also plenty of undocumented ARM SBCs that are much worse from this PoV than the Intel/AMD based computers, where at least the IBM PC standards and the later standards pushed by Intel, e.g. ACPI/UEFI, apply. The Allwinner CPU used in this robot has almost non-existent documentation, in comparison with Intel Alder Lake N, so it is much farther from "open hardware".
You have mentioned the NVIDIA Jetson modules, which are based on Thor/Orin/Xavier. Those have excellent documentation, but you have to register at NVIDIA, for a free account, in order to access it. The documentation is not the problem with them, but the fact that they are greatly overpriced, like almost anything made by NVIDIA. Unless your application critically depends on some feature provided by NVIDIA, for which no acceptable alternatives exist, choosing Jetson is a very bad decision, because the alternatives are usually both better and cheaper.
The SBCs based on Cortex-A55 are the cheapest for the purpose of running Linux that still have a decent performance and they may be sufficient for many applications.
However, the SBCs based on either Intel Alder Lake N or on ARM Cortex-A7x cores are in a completely different class of performance, so they are more future-proof as they can enable the implementation of applications that were not taken into consideration in the beginning. Moreover, as pointed by the other poster, none of the Cortex-A55 SBCs implements any kind of standard, so migration to any different SBC may require significant work, unlike with the Intel/AMD SBCs, which are mostly interchangeable.
The Intel Alder Lake N/Twin Lake cores (Gracemont cores) have a performance similar to the ARM Cortex-A78 cores, which for now can be found only in few SBCs, which use Qualcomm, Mediatek or NVIDIA CPUs. The Cortex-A76 cores, which are used in Rockchip 3588 and in the latest Raspberry Pi, have a speed of only around 2/3 of the Gracemont/Cortex-A78 speed, at the same clock frequency.
Cortex-A55 cores are many times slower than any of these bigger cores. A single Intel SBC (or Cortex-A7x based SBC), can replace both Cortex-A55 SBCs of this design, at about the same cost, improving the cooling and probably lowering the power consumption, while also providing a significant performance headroom for future extensions.
While using 1 Cortex-A55 SBC for minimum cost may make sense, using 2 is a definite mistake, as they should be replaced by 1 better SBC.
I have mentioned the open-hardware Intel-based ODROID H4. The same company makes several models of ARM-based SBCs, which I would trust much more in an outdoors robot, than the choice done in the parent article, because the cooling behavior of all of them is carefully tested and reported on their site, and because it is a company that has been around for many years, demonstrating reliable hardware. Avaota provides much less information about their product than Hardkernel, i.e. they only give schematics/PCB information, without any information about power consumption, and especially about thermal behavior, which is essential in a robot application.
> There are four pair of wires in the cable. If you use all of them for TX, you can't receive.
No, you absolutely can use them all for transmit and receive at the same time. The device at each end knows what signal it is transmitting, and can remove that from the received signal to identify what has been transmitted by the other end.
This is the magic that made 1000Base-T win out among the candidates for Gige over copper, since it required the lowest signaling frequencies and thus would run better over existing cables.
It's both. Anything that you effectively have optimized to the details of its environment will end up dependent on that environment. If that environment is the real world, then it's fine. If that environment is a simulator, now you have sim-to-real problems.
There's always going to be a gap between reality and simulation, because simulation fidelity has an incredibly long tail. "Digital twins" are relatives, not identical replicas, because everything about capturing the real world for simulation involves simplification and discretization and abstraction.
Because "brand new" doesn't mean devoid of context. Within your domain, there will still be common libraries, interfaces, and tools.
C++ is very flexible, with a lot of very mature tooling and incredibly broad platform support. If you're writing some web server to run on the hardware of your choosing, then sure, that doesn't matter. But if you're writing something deeply integrated with platform/OS interfaces, or graphics, or needs to support some less common platforms, then C++ is often your only practical option for combining expressiveness and performance.
This is the sort of info I was trolling for, but what are those platforms and os? Targets llvm doesn't handle yeah c++ makes sense, or c. A sibling mentions xcode, which makes sense. Graphics seems questionable, vulkan support is fine. Windows support has seemed finetoo, the same gui has worked as what we wrote for Linux.
Dependencies. There are billions of lines of C++ out there that have been optimized and production hardened over decades that you might want to reuse. Rust lang interoperability with anything but C sucks in practice.
> At the big tech firms, there are engineers looking for software fixes that make tiny efficiency improvements that can save lots of money at scale.
Meanwhile, Google and Apple look for whatever ways they can to improve battery life on their phones.
While this is true for parts of these companies, I think the user experience with their products makes it clear that the performance focus only goes in a very select few areas.
Perhaps my favorite Google example is the absolute dogshit performance of Google Home devices. By any objective metric, these are fairly capable computers (quad-core arm64 processors) running a tiny number of apps and yet their UI is still incredibly sluggish. Better yet, these are basically the only real-world devices that run Fuchsia - they should be shining examples of the performance of a brand new OS and yet they are anything but.
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