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I've been working on my own programming language, Haven - https://github.com/miselin/haven

Lately, I've been hacking on improving its linear algebra support (as that's one of the key focuses I want - native matrix/vector types and easy math with them), which has also helped flush out a bunch of codegen bugs. When that gets tedious, I've also been working on general syntax ergonomics and fixing correctness bugs, with a view to self-hosting in the future.


Also, for the CDN case that R2 seems to be targeting - regardless of the origin of the data (R2 or S3), chances are pretty good that Cloudflare is already paying for the egress anyway.


It's actually worse than that.

In the CDN case Cloudflare has to fetch it from the origin, cache (store) it anyway, and then egress it. By charging for R2 they're moving that cost center to a profit one.


I'm not sure about that.

A CDN keeps the data nearby, reducing the need to pay egress to the big bandwidth providers.

( not an expert though)


Let's say you want to use cloudflare, or another CDN. The process is pretty simple.

You setup your website and preferably DON'T have it talk to anyone other than the CDN.

You then point your DNS to wherever the CDN tells you to. (Or let them take over DNS. Depends on the provider.)

The CDN then will fetch data from your site and cache it, as needed.

Your site is the "origin", in CDN speak.

If Cloudflare can move the origin within their network, there is huge cost savings and reliability increases there. This is game changing stuff. Do not under estimate it.


This is so cool to see and play with, and unlocks plenty of memories. Years ago I built a compiler/decompiler (my first compiler, even) for programs in the TI-84 program format. I never braved any kind of actual _running_ of those programs. Neat project!


This would be wonderful - I hacked on a CPU architecture and brought it to an FPGA by manually converting a Logisim [1] schematic to VHDL. It's still terribly buggy.

Maybe it'd be possible to write an integration for the (unmaintained) Logisim to export the schematic to a HDL of some sort to get close.

[1] http://www.cburch.com/logisim/


> Maybe it'd be possible to write an integration for the (unmaintained) Logisim to export the schematic to a HDL of some sort to get close.

No need, Digital (https://github.com/hneemann/Digital) already does this:

> A circuit can be exported to VHDL or Verilog. There is also direct support for the BASYS3 Board and the TinyFPGA BX board. See the documentation for details. The examples folder contains a variant of the example CPU, which runs on a BASYS3 board.


This is years old... but this is one of my tracks that I keep comparing anything new to and falling short (and so I haven't released much since then!)

https://open.spotify.com/track/4TUNYMie5a5emn3mc8nE7f?si=7P0...


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