Author here. Happy to discuss the technical details. The broader goal is to understand the 80386 microcode and hardware, and build an FPGA core around it, similar to what was already done for the 8086.

Right. Or it could be frequency illusion. Once you become aware of something, it appears to be more frequent:

https://en.wikipedia.org/wiki/Frequency_illusion

xtce_trace sounds fantastic — exactly what I need right now while debugging my Verilog 8086 core. Thank you also for the microcode disassembly. It’s been fun to work through.

It currently uses 44% of the LUTs and 59% of the BRAMs (out of 340 × 2 KB blocks). The chip itself is fairly large and inexpensive, though performance leans toward the lower side.

Yes, for exactly the reason. SDRAM is much easier to work with in retro computing than DDR.

My first DDR system, an Athlon XP, feels like a very different beast than my 440BX with SDRAM despite being only a couple years newer. :)

I had that with a Geforce2. Or was Athlon 2000. Wait, Athlon 2000 at 1666 MHZ, really fast until the capacitors on a Gigayte motherboard blew up.

Author here. You’re right—EDO or FPM would be correct for the era. But as others have noted, DDR3 is fundamentally different from early 1990s memory, and it simply won’t run at the very low clock speeds of a 486. SDRAM, on the other hand, behaves in a way that’s much more comparable to the memory used back then.