Cell behaves more like a CPU + GPGPU system, big.LITTLE can schedule an instruction stream on any core of the cluster (depending on the configuration setup), on Cell you'd primary use the general-purpose PPE from which you'd start (and chain) vector-based threads on SPEs.
PPE and SPE don't even share an ISA, SPE have a custom-built SIMD-oriented ISA.
The difference is that big.LITTLE ARMs use the same instruction set on all cores. In general I wouldn't expect a lot of terminological rigor from blog posts.
One question about the intro, which states that this is the first mass produced AMP architecture, but isn't the PlayStation 3's Cell CPU one?