Theoretically yes. One is stateful and the other is not, but you can always simulate one with the other.
Practically no. DRAM is built with capacitors as its storage elements. Each bit has no feedback and requires refresh, which makes it slow. But it only requires one transistor per bit, so it's cheap and every bit takes up very little physical space. Static RAM, OTOH, (registers and fast cache) is built out of flip-flops. It has feedback so it doesn't need refreshing and it's fast. But every bit requires 4 or more transistors, so it's physically large per bit and expensive.
>"Static RAM, OTOH, (registers and fast cache) is built out of flip-flops. It has feedback so it doesn't need refreshing and it's fast"
DRAM also has feedback no? I mean thats what differentiates is from combinatorial circuits correct?
I understand SRAM is flip flops vs single bit transistors. I guess I'm not sure why you are saying it has feedback to differentiate SRAM(registers) from DRAM.
The individual bits of DRAM don't use internal feedback; they work by storing charge on a capacitor that slowly leaks away. Their outputs don't help them maintain their state (except during a refresh cycle, and in that sense one could say they use feedback).
The flip-flops in SRAM always have internal feedback that causes them to a) switch state quickly and b) maintain their state after switching. This is an example of positive feedback, as opposed to the more well-known negative feedback used in control systems. I was trying to say that there's more than one way to save state, and it's state that distinguishes memory from combinational logic, not feedback.
https://en.m.wikipedia.org/wiki/Memory_cell_(binary)
