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Agree'd.

The main thing is that the low-level details of macrocells varies from company to company. And those companies are protective of their designs, so they don't want people figuring out how their devices really work.

So it is a tough spot. Still, Verilog allows you to move your "code" from company-to-company (Xilinx, Altera, and Lattice). So its sufficient.



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