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The LUT based architecture is starting to run out of steam, I think a CGRA sort of architecture is the future, but programmable logic startups will likely fail, and there's approximately a zero percent chance that Xilinx or Altera would try anything that new.



Problem is you still generally need simple logic to combine some course grained blocks. Also we have a lot of FGPA's that including adders, RAM, DPS cores, and more course grained devices.

Honestly, a LUT can be pretty efficient structure for what it does. The biggest advantage to coarse grained structures is their they are much faster since the internal construction can use optimal routing.

The biggest issue with FGPA's is the programmable routing/connections. Ideally each LUT would form a complete graph. However, the number of wires grows at the approx rate n(n-2)/2 where N is the number of LUTs. So instead the structure is more hierarchical. Still the majority of silicon on an FPGA is still just used for routing.

However, I think an array of ALU's actually could be quite useful for some applications over an FPGA.


I think GPUs, FPGAs and scalar cores will all mix into a single fabric. As you mentioned, FPGAs are getting dedicated hard blocks, GPUs are getting scalar cores and CPUs are getting LUTs.

> However, I think an array of ALU's actually could be quite useful for some applications over an FPGA.

http://www.adapteva.com/announcements/epiphany-v-a-1024-core...

http://www.greenarraychips.com/home/documents/greg/PB001-100...

http://www.xmos.com/products/silicon/xcore-200


No, I understand, but the granularity of the LUT exacerbates the routing problem, because in a CGRA you can route multiple wires at once.


Well this depends on the underlying routing architecture of either system. However you are right in general since finer grain logic means more things that need routing.

Nothing stops you from treating LUT outputs in groups like corse grain system though. FPGA manufactures could make chip with a different routeting topology that works really well for certain applications.

However, we could be making lots of devices that fit certain data flow patterns better. By doing so makes the devices simpler and faster.

Routing is pretty important. Its just current FPGAs are built with quite flexible interconnect.

If you want see really limited programble interconnect look at some old PLDs that you program by blowing fuses.




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