Good summary! There is a coreboot video that talks about exactly this process (although very brief) you've described, "coreboot: x86 system boot and initialization", it presents a step by step procedure with a descriptions of various steps (DRAM init, Northbridge/Southbridge init) necessary to bring the system to point where it can boot OS. https://www.youtube.com/watch?v=xc08SN6Dhz4
> Once that is loaded up, the firmware loads and activates the RAM and disables the Cache as RAM.
This is an interesting step.
Initialing the memory controller and activating RAM is a difficult process on modern hardware. When the computer first boots with a fresh RAM module, BIOS needs to "train the memory" to make it usable. "Training the memory" means commanding the DDR controller to perform a series of testing to find the suitable operating parameters (e.g. latency) for the RAM, which is required to overcome the hardware variation on the electrical level. It's a combination of heuristics and lookup-tables, which can partially explain the variance of compatibility of RAM and different motherboards. It's also why the computer may have 10 seconds of apparent "black screen of death" on boot if you just updated BIOS (or installed a set of fresh RAM), which can be scary ;-).
On many platforms there is no free and open source implementation and coreboot developers had to reverse-enginner Intel's blob.
It's not all BIOS updates either, in my experience. Only those that affect parts of the firmware inside the CPU since the BIOS itself is way to late in the process. (ie Microcode updates, IME/AGESA/PM updates, etc.)
Personal experience confirms this somewhat, as boot after BIOS update can take 15 seconds or 1 second, depending on the update.
> Once that is loaded up, the firmware loads and activates the RAM and disables the Cache as RAM.
This is an interesting step.
Initialing the memory controller and activating RAM is a difficult process on modern hardware. When the computer first boots with a fresh RAM module, BIOS needs to "train the memory" to make it usable. "Training the memory" means commanding the DDR controller to perform a series of testing to find the suitable operating parameters (e.g. latency) for the RAM, which is required to overcome the hardware variation on the electrical level. It's a combination of heuristics and lookup-tables, which can partially explain the variance of compatibility of RAM and different motherboards. It's also why the computer may have 10 seconds of apparent "black screen of death" on boot if you just updated BIOS (or installed a set of fresh RAM), which can be scary ;-).
On many platforms there is no free and open source implementation and coreboot developers had to reverse-enginner Intel's blob.