> is there a common standard for how they are using the pins?

None that I'm aware of. Considering some pinouts I've seen my guess is that different vendors simply assign them as they see fit. Also, especially ARM SoCs have widely varying capabilities, and different SoMs have all kinds of different hardware on module/off module, different bus systems they support, and so on. Also, some SoCs can change some of their pin assignments to a degree. Given all that and considering that the whole purpose is usually to cheaply develop semi-customized embedded hardware for specific applications, there might not be much demand for that either.

One thing about the memory bus is that it is a perfectly good bus for devices. You absolutely can put something like a computer into a memory socket and use it as a device. You simply latch onto a particular memory address that's not going to be used for memory and whenever you see that you know the memory bus is for your device.

I don't know if this is merely form factor compatible or an actual device for a SO-DIMM memory socket but there really isn't anything stopping you making a DIMM socket peripheral device except the need for external power.

Huge difference between memory bus in front of memory controller vs behind it. You cant just plug yourself into a DIMM slot and act like a device on a memory bus. You will have to perfectly emulate particular ram supported by your memory controller (protocol, access patterns, timings), and this will be strictly a slave affair.

> If there are multiple vendors around SO-DIMM SoCs, is there a common standard for how they are using the pins?

Not really. If you want a common standard with multiple vendors, look at COMexpress and Qseven, with the former sporting everything up to Xeon CPUs and the latter low-power (12W TDP, iirc) only.