> Is there really an epidemic of EE's who know how to use a field solver, but don't know to consider coupling between signal lines?
Now, I'm not an EE myself, just someone who took undergraduate electrodynamics, decided to read up the subject, and found some truly excellent videos on youtube.
> I spend most of my consulting time solving EMI problems because
most of the engineers I meet have no clue about any of this. My
job is so easy and I make such a ridiculous amount of money doing
it. It's just unbelievable; I solve most EMI problems by simply
adding returned vias to boards or changing the positions of
decoupling caps, I mean the things are so simple and ridiculous
it's amazing and if these guys would educate themselves they
wouldn't need to hire me.
So I gather that there is a problem. It's not that EEs don't know to consider coupling between signal lines, but because most of them persist in thinking that signals travel in wires, rather than in the fields, they don't understand when coupling will occur and when it won't. Sure, they can look at the result of the field solver and realize they have a problem, but without thinking in terms of fields they don't know how to solve it. So, they fix it either with trial-and-error until the field solver is happy, or by following design patterns that are passed down as an oral tradition, but without actually understanding why it works or what the problem was in the first place.
That's simple to understand if you think in terms of fields. Even worse, if you have signal lines that are parallel and on top of one another (on different planes), referencing the same ground plane from the same side, then it doesn't matter how far apart those planes are, they're going to couple strongly since the fields overlap. You can have two traces right next to each other that have virtually zero coupling because they're stripline, or, if you have a stackup with a single ground plane on the bottom layer, a signal line on top of that, and a signal line on layer one parallel and on top of the bottom trace, they're virtually on opposite sides of the board and yet they'll couple strongly. And if you don't think in terms of fields, you'll observe that, whether in simulation or on a circuit board, and have no idea why it happens or how to fix it.
Here's Rick talking about the state of the industry in the 1980s and 1990s: https://youtu.be/ZYUYOXmo9UU?t=4295. It's clear that no, EEs weren't taught this, they didn't understand it. The situation has, I believe, improved somewhat, but only perhaps in the last decade or two. I would guess that even today, most EEs still don't really understand this (or Rick wouldn't be making so much money consulting).
> Personally, I didn't get hostility from any of their videos.
Perhaps "hostility" is the wrong word. I think on reflection "dismissiveness" is better.
Like, "Yes, we know that Maxwell's Equations are the ground truth. We were all taught that and understand it. But that's not the way practicing engineers work -- we use models like transmission lines and lumped-element. It's technically correct, but more of a curiosity than anything. It's not something we really need to think about, and certainly not useful for a general audience -- more likely to confuse them than anything."
That's the general impression I got. And I think, that not only was Veritasium technically correct, but that model is useful, and most EEs don't use it when they probably should.
Most of us here on hn are software developers. I think that most would probably agree that on the whole, we're all pretty terrible at it. Why would you think Electrical Engineering would be different? Because they're "real" engineers, whereas we just sometimes call ourselves "software engineers" (knowing that's pretty much a lie)?
Here's a presentation by Eric Bogatin that reminded me more than a little of the sort of cargo-cult design patterns that pervade software engineering: https://www.youtube.com/watch?v=y4REmZlE7Jg
I think you're correct for the most part. I think us EEs tend to compartmentalize the information we've learned in school; while we may technically have all the "tools", knowing when to apply that knowledge isn't always apparent.
I definitely think there is a lack of applied EE knowledge; PCB layout with an emphasis on signal integrity etc would make an excellent undergrad course in school.
In terms of PCB layout -- Eric & Rick have been absolute goldmines in terms of the knowledge they've put out there. I can also say that both of the FAANG companies I worked with sent us EEs to their training seminars, which were super useful (and shows that there is recognition in the industry that EEs need better training on these sorts of issues). I also think there is a bit of an art to it -- you learn when layout issues are significant or not, and can identify them by eye. This is something you learn by experience. For me, I've found field solvers are a great way to validate / hone my intuition.
> PCB layout with an emphasis on signal integrity etc would make an excellent undergrad course in school.
This is strongly frequency and wave-form dependent. Just the difference between square waves and sine waves and say a few KHz to a few 10's of MHz can have dramatic consequences on how hard it will be to get a circuit to behave in the way you intended it to.
I think one of the bigger insights you can have when designing circuitry is that you may be working on a digital circuit but from an electrical engineering point of view digital simply doesn't exist, that's just a signalling convention, there is only analog.
I think it was in one of Rick Hartley's videos that he talked about designing for analog vs digital. There are a bunch of points I remember, in no particular order:
- the frequency of your circuit, that you need to design for, is determined by the rise and fall time of your ICs, not your clock. (With your square wave, for example, it's impossible for it to actually be square; it has some finite rise and fall time that determines the frequency you need to design to).
- IC manufacturers almost never actually tell you the rise and fall time of their chips. Also, they might do a die shrink at any time, resulting in you having to redesign your circuit to accommodate the higher frequencies from smaller, faster transistors (even if it operates at exactly the same clock frequency as before). If you're lucky, they'll even tell you about the die shrink rather than just letting you find out when suddenly your design stops passing EMI testing.
- high-frequency can be easier than low-frequency; you really need to pay attention to impedance control, but so long as everything is well laid-out the fields will stay closely contained. The lower the frequency, the more the fields will spread and the greater the risk of having problems such as crosstalk.
- Digital is easier than analog. Digital can tolerate a lot of noise before a 0 becomes a 1 or vice versa. Whereas if you're sending a signal to a 24-bit ADC, you might have to go a bit crazy and use a PCB-embedded waveguide, or something, to give it the isolation it needs.
- Even if digital signals are quite resilient from a signal integrity standpoint, you still have to pay close attention to crosstalk because it takes very little common mode current to cause an EMI problem. And you have to pay attention to EMI if you actually want your design to pass emissions testing to be able to sell it.
- Even at high frequencies, anything at a length scale less than (wavelength of maximum frequency)/10 can be treated as a lumped element. So if it's possible to jam two high-frequency ICs right up against one another, with the pads pretty much touching, that's probably actually better than a carefully impedance-controlled transmission line connecting them. That's not really applicable to some monster BGA chip, but if you're designing a switched-mode power supply you can make the node between the inductor and MOSFET a lumped element by placing them as close as possible.
EEs tend to be pretty practical in the same sense that mechanical engineers are pretty practical: they build stuff in ways that they (think they) understand to give them as good a chance as producing something that works the first time around. But the devil is in the details and mechanical engineers have one huge advantage: they deal with stuff at a scale where getting it wrong will have visible consequences. An electrical engineer getting their assumptions about electric fields emanation wrong is going to have a difficult problem to solve, electric fields don't readily visualize and without a very solid understanding of the theory it is extremely easy to mess this up. This is one reason why people tend to be conservative, if you do it 'like it is usually done' then the chances of discovering new and potentially expensive ways to mess it up go down a bit.
I once - long ago - rebuilt a transmitter that I had designed using 'regular' components in the air on a circuit board. It took 6 tries to get it perfect, and every time I learned about a new assumption that wasn't exactly spelled out anywhere but that really made a huge difference in how the circuit operated.
The electrical schematic was identical every time, the only thing that changed was the topology in space. And the difference between iteration #1 and iteration #6 from a performance point of view was huge, much larger than you would have ever thought could be the consequence of the very subtle changes to the various trace geometries.
No matter how much you know - or don't know - about the way electrical fields interact with each other be prepared to be surprised, this stuff is simply hard when your circuitry goes beyond a minimum level of complexity.
Interesting tidbit: many years later when designing the windmill stator/rotor/coil assembly some of this knowledge came in quite handy.
Did you perhaps mean you changed the geometry instead of topology? Your comment got me wondering if you can change the topology without changing the schematics and I now think you can, as a schematic only defines the electrical connections and the topology is I think also the non electrical relations (what component is next to what). As far as I know topology is strictly dimensionless; size and distance are properties of the geometry. If I were not on HN I would apologise for the pedantry, but here we are
There's nothing deficient about transmission lines or lumped element models for answering the riddle. Distributed element models of transmission lines [1] clearly show a straight line path directly from the battery to the bulb without going through the whole wire.
Electroboom's criticism is that even if you're not misdirected by the setup, there's still a missing assumption required to arrive at the same answer as Veritasium.
Now, I'm not an EE myself, just someone who took undergraduate electrodynamics, decided to read up the subject, and found some truly excellent videos on youtube.
But, at 1:00:23 in that same video I linked before (https://youtu.be/QG0Apol-oj0?t=3623), Rick Hartley says this:
> I spend most of my consulting time solving EMI problems because most of the engineers I meet have no clue about any of this. My job is so easy and I make such a ridiculous amount of money doing it. It's just unbelievable; I solve most EMI problems by simply adding returned vias to boards or changing the positions of decoupling caps, I mean the things are so simple and ridiculous it's amazing and if these guys would educate themselves they wouldn't need to hire me.
So I gather that there is a problem. It's not that EEs don't know to consider coupling between signal lines, but because most of them persist in thinking that signals travel in wires, rather than in the fields, they don't understand when coupling will occur and when it won't. Sure, they can look at the result of the field solver and realize they have a problem, but without thinking in terms of fields they don't know how to solve it. So, they fix it either with trial-and-error until the field solver is happy, or by following design patterns that are passed down as an oral tradition, but without actually understanding why it works or what the problem was in the first place.
Here's an example: https://youtu.be/52fxuRGifLU?t=1719
That's simple to understand if you think in terms of fields. Even worse, if you have signal lines that are parallel and on top of one another (on different planes), referencing the same ground plane from the same side, then it doesn't matter how far apart those planes are, they're going to couple strongly since the fields overlap. You can have two traces right next to each other that have virtually zero coupling because they're stripline, or, if you have a stackup with a single ground plane on the bottom layer, a signal line on top of that, and a signal line on layer one parallel and on top of the bottom trace, they're virtually on opposite sides of the board and yet they'll couple strongly. And if you don't think in terms of fields, you'll observe that, whether in simulation or on a circuit board, and have no idea why it happens or how to fix it.
Here's Rick talking about the state of the industry in the 1980s and 1990s: https://youtu.be/ZYUYOXmo9UU?t=4295. It's clear that no, EEs weren't taught this, they didn't understand it. The situation has, I believe, improved somewhat, but only perhaps in the last decade or two. I would guess that even today, most EEs still don't really understand this (or Rick wouldn't be making so much money consulting).
> Personally, I didn't get hostility from any of their videos.
Perhaps "hostility" is the wrong word. I think on reflection "dismissiveness" is better.
Like, "Yes, we know that Maxwell's Equations are the ground truth. We were all taught that and understand it. But that's not the way practicing engineers work -- we use models like transmission lines and lumped-element. It's technically correct, but more of a curiosity than anything. It's not something we really need to think about, and certainly not useful for a general audience -- more likely to confuse them than anything."
That's the general impression I got. And I think, that not only was Veritasium technically correct, but that model is useful, and most EEs don't use it when they probably should.
Most of us here on hn are software developers. I think that most would probably agree that on the whole, we're all pretty terrible at it. Why would you think Electrical Engineering would be different? Because they're "real" engineers, whereas we just sometimes call ourselves "software engineers" (knowing that's pretty much a lie)?
Here's a presentation by Eric Bogatin that reminded me more than a little of the sort of cargo-cult design patterns that pervade software engineering: https://www.youtube.com/watch?v=y4REmZlE7Jg