I also want to refer you to this http://fpgacpu.org/ especially the XSOC links. Jan builds a complete SoC-on-a-FPGA in really 'ancient' fabric (4000-series Xilinx) for Circuit Cellar (articles available on this site). He also hacks a C compiler to emit code for his 16-bit RISC machine (which is very clever).

This is historical, but a 'must read' if you're new to this stuff.

I've posted a few examples here[1]. It's from the same ALU code that I had trimmed to give you an example. It just outputs some results to an RGB led.

It shows the logical view, the allocated blocks and the routing in Lattice Radiant IDE.

I haven't done much with the Cyclon IV yet, but I found the iCE40 very easy to get rolling with and the freely available tools have been great so far.

It's not a huge FPGA though so if you want to do large projects maybe consider something else. But as a starter I think it's been great.

[1]: https://imgur.com/a/ZaV9Wvr

I use the iCE40 with 8K LUTs. It's 'old' but the open-source chain is nice, the vendor-supplied chain is fine, and it's 'big enough' to do fairly serious stuff.

Like the subc compiler I mentioned, the tradeoffs working with an older FPGA like that are ok to me.

GL! p.s. I mostly used the TinyFPGA BX to learn about the iCE40, but it doesn't have enough pins to make even a semi-decent full machine (with wide memory bus) so I use the Lattice HX 8K dev board. It's also easy to use.

You can certainly inspect the synthesized primitives, either graphically post-place&route, or in a netlist which is usually a tangled mess.

Typically you're doing so either because you're curious, you're debugging a timing problem, or you're trying to make sure the toolchains inferred a particular primitive you are trying to use on purpose. It's not terrifically informative otherwise.