Hacker News
new
|
past
|
comments
|
ask
|
show
|
jobs
|
submit
login
codedokode
on March 26, 2023
|
parent
|
context
|
favorite
| on:
Open-source high-performance RISC-V processor
As I understand that is performance in a simulator, and it is unknown what delays are going to be between pipeline stages on real hardware.
rowanG077
on March 27, 2023
|
next
[–]
Performance in a simulator is cycle accurate to the real world.
brucehoult
on March 27, 2023
|
prev
[–]
"delays" affect the MHz, not the performance per MHz. Tools for predicting MHz are fairly accurate.
Also, VROOM works in FPGA not only in verilator.
Join us for
AI Startup School
this June 16-17 in San Francisco!
Guidelines
|
FAQ
|
Lists
|
API
|
Security
|
Legal
|
Apply to YC
|
Contact
Search:
