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Just the other day I came up with an idea of doing a flatbed scan of a circuit board and then using machine learning and a bit of text promoting to get to a schematic

I don't know how feasible it is. This would probably take low $millions or so of training, data collection and research to get not trash results.

I'd certainly love it for trying to diagnose circuits.

It's probably not really that possible even at higher end consumer grade 1200dpi.



This would be an interesting idea if you were able to solve the problem of inner layers. Currently to reverse engineer a board with more than 2 layers an x-ray machine is required to glean information about internal routing. Otherwise you're making inferences based on surface copper only.


Maybe not. I scanned a bluetooth aux transceiver yesterday as a test of how well a flatbed can pick up details. There's a bunch of these on the market and the cheap ones, they are more or less equivalent. It's a CSR 8365 based device, which you can read from the scan. The industry is generally convergent on the major design decisions for some hardware purpose for some given time period.

And the devices, in this case, bluetooth aux transceivers, they all do the same things. They've even more or less converged on all being 3 buttons. When optimizing for cost reduction with the commodity chips that everyone is using to do the same things, the manufacturer variation isn't that vast.

In the same way you can get 3d models from 2d photos because you can identify the object based on a database of samples and then guess the 3d contours, the hypothesis to test is whether with enough scans and schematics, a sufficiently large statistical model will be good enough to make decent guesses.

If you've got say 40 devices with 80% of the same chips doing the same things for the same purpose, a 41st device might have lots of guessable things that you can't necessarily capture on a cheap flatbed

This will probably work but it's a couple million away from becoming a reality. There's shortcuts that might make this a couple $100,000s project (essentially data contracts with bespoke chip printers) but I'd have to make those connections. And even then, it's just a hobbyist product. The chances of recouping that investment is probably zero although the tech would certainly be cool and useful. Just not "I'll pay you money" level useful.


I think good RE houses have long since likely repurposed rapid PCB testing machines to determine common nets using flying CNC probes. The good ones probably don't need to depopulate to do it.


As long as you are OK with destructive methods, grinding/sanding the board down gives you all layers. "PCB delayering" is the search term.




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