This, along with HP's memristor technology, are both potential disruptions in the non-volatile space. Phase-Change Memory (PCM) is faster than flash but both it and flash have issues with minimum feature size since they depend on very specific physics to work (heat in the PCM case, electrons in Flash's case).
A VC asked me if I saw these things disrupting the disk industry, and frankly I don't. At NetApp they used a term 'near line' to describe their SATA based filers. The concept was that these things were dense enough and cheap enough that you could put data that normally would be 'offline' on tape, online on disks, except with performance limitations (hence nearline rather than online).
I see these as nearline memory, dense and non-volatile so you don't have to re-initialize after a power failure, you put data in this stuff that would otherwise be in memory.
If we could get Intel to support a damn IO MMU such that the 64 bit PCIe space could bad added into the page tables like RAM is, we could actually make good progress in systems design. (insert rant about using a disk API to talk to memory chips here ...)
Samsung had an 8Gb PRAM at ISSCC12, but I haven't heard if it's gone into production.
Most of the memory manufactures are aiming for cellphones where I guess they believe they have chance of going against flash even with lower density. The only other product I've seen with new ram technology is a hybrid SSD containing some MRAM as cache.
I can't wait for this to get mature enough to get a nice reliable (even if small) SSD without flash's issues.
A VC asked me if I saw these things disrupting the disk industry, and frankly I don't. At NetApp they used a term 'near line' to describe their SATA based filers. The concept was that these things were dense enough and cheap enough that you could put data that normally would be 'offline' on tape, online on disks, except with performance limitations (hence nearline rather than online).
I see these as nearline memory, dense and non-volatile so you don't have to re-initialize after a power failure, you put data in this stuff that would otherwise be in memory.
If we could get Intel to support a damn IO MMU such that the 64 bit PCIe space could bad added into the page tables like RAM is, we could actually make good progress in systems design. (insert rant about using a disk API to talk to memory chips here ...)