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I am very interested in knowing how they are able to get such precise measurements with an ESP32.

In their chart there is a time of arrival difference that has nano second accuracy. The ESP32 runs at 240MHZ max, and usually it takes several cycles to read certain values, so I really wonder how they were able to pull it off.

Please enlighten me.



Every WiFi chip needs to be able to synchronize to the received signal down to a few I/Q samples (the remaining synchronization error is accounted for by the cyclic prefix of OFDM). For example, with 40MHz of bandwidth, there is an I/Q sample every 25 nanoseconds (the wave travels 7.5m during that time), so the level of synchronization will be on that order. The ESP32 reports the time of arrival, the code for extracting a nanosecond-precision timestamp is here: https://github.com/ESPARGOS/pyespargos/blob/main/espargos/po...

Additionally, you can use the phase information in the estimated channel coefficients (CSI) to determine the more precise time of arrival. Very briefly, a time delay in time domain will be visible as a frequency(=subcarrier)-dependent phase shift in frequency(=subcarrier)-domain. Now synchronization is only limited by impairments like thermal noise and phase noise. In practice in nice lab conditions, the time of arrival accuracy is on the level of <<1m.

On top of phase differences between subcarriers (--> timing information), we also measure phase differences between antennas, which provides angle of arrival and, with multiple arrays, phase of arrival information.

You can go even further by measuring phase differences between subsequent packets, which provides frequency offset and Doppler (--> velocity) information. I have some nice results on that, but that's a topic for the future ;)


Thank you for your reply, I have been reading the code and there are some things that I am not sure to understand.

- The Espargos code uses rxstart_time_cyc & rxstart_time_cyc_dec for the ns timestamp calculation

- Both values are not documented in the Espressif code and just marked as /*< reserved */

- The timestamp parameter is documented but it is in "microseconds"

Is there anywhere I can find more documentation on the "rxstart_time_cyc" and "rxstart_time_cyc_dec" fields? Are these cycle counters from the wifi chip?



It makes sense now. Thanks.


(unrelated to ESP32)

You can often get some sample timing resolution from a sampled signal by interpolating the result of a complex correlation. You start by searching the correlation output for the loudest hypotenuse lag, then take he worked tangent of the quadrature information of that lag to estimate the sub-sample event time


> The ESP32 runs at 240MHZ max

Luckily for 802.11mc, host CPU speed is not used in the distance estimation.


Just a gas but maybe it's because they're using multiple esp32's in an array? But also I seem to recall something similar in the Snowden papers? But I get your point, given that the esp32 and all its design files are available from SPRESIF maybe they built a board that's running out of much faster clock rate? PS: sorry about the typos and miss takes but sadly I have to use Voice typing due to a recent traumatic injury.


As shared elsewhere in this thread: https://www.youtube.com/watch?v=sXwDrcd1t-E

TL;DW: the ESP’s WiFi driver provides per incoming packet the carrier’s phase and amplitude. All ESPs are calibrated relatively to each other.




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