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Rust is far from obscure.

some HDLs should fit the bill: VHDL, Verilog or SystemC



I taught Digital Design this semester - all models output nonsensical VHDL. The only exception is reciting “canonical” components available on technical and scientific literature (e.g., [1]).

[1] https://docs.amd.com/r/en-US/ug901-vivado-synthesis/Flip-Flo...




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