Very cool. I've been sketching out a relay computer myself. Mostly unbuilt but I have tested a variety of circuits implementing gates, latches, oscillators, flip flops, counters, registers all using only SPST reed relays.
I'm fixated on speed. I connected some reed relays in a 3 stage ring oscillator and it ran at 1.8 kHz. That has me thinking that with a pipeline 100 instructions a second might be attainable. Reed relay logic seems to be fast enough for a UART at 50 baud. Teletype interactivity is a stretch goal.
My program counter is also 12 bits! And I've also been using Digital to simulate parts of it. Great tool for that.
The current design is RISC-like with a 12 bit word requiring 4 cycles for most instructions. I have an old version of the design specified in gate level Verilog. I should publish that. Though I'm forever tinkering with the control such that it'll probably never be done. Karnaugh maps are like Sudoku.
Oscillator can go high, but real logic is complex and requires realiability. and the fact that cheap relays are absolute crap with a ton toff spread between 3ms to 18ms! The actual clock frequency you can hope for is around 10-15 hz :(
I'm fixated on speed. I connected some reed relays in a 3 stage ring oscillator and it ran at 1.8 kHz. That has me thinking that with a pipeline 100 instructions a second might be attainable. Reed relay logic seems to be fast enough for a UART at 50 baud. Teletype interactivity is a stretch goal.
My program counter is also 12 bits! And I've also been using Digital to simulate parts of it. Great tool for that.
The current design is RISC-like with a 12 bit word requiring 4 cycles for most instructions. I have an old version of the design specified in gate level Verilog. I should publish that. Though I'm forever tinkering with the control such that it'll probably never be done. Karnaugh maps are like Sudoku.