If the author says "transistor-level simulation" I would expect that to mean all transistors in the simulation are modeled. Is that true?
Since they are nonlinear devices, doing so is relatively expensive computationally.
If so, I'd be interested to learn the rationale for it. I would expect (and could be wrong) that an Atari could be simulated at the logic level adequately.
> Logic simulation or gate-level simulation can also be used to check the timing performance of an ASIC. In a gate-level simulator a logic gate or logic cell (NAND, NOR, and so on) is treated as a black box modeled by a function whose variables are the input signals. The function may also model the delay through the logic cell. Setting all the delays to unit value is the equivalent of functional simulation. If the timing simulation provided by a black-box model of a logic gate is not accurate enough, the next, more detailed, level of simulation is switch-level simulation which models transistors as switches—on or off. Switch-level simulation can provide more accurate timing predictions than gate-level simulation, but without the ability to use logic-cell delays as parameters of the models. The most accurate, but also the most complex and time-consuming, form of simulation is transistor-level simulation. A transistor-level simulator requires models of transistors, describing their nonlinear voltage and current characteristics.
It looks like they're only working with logic levels, rather than "actual" device simulation. It's reasonably common in the digital IC crowd to call this "transistor-level", but indeed, it's not what most EEs usually call a transistor-level simulation (where one would actually expect the behaviour to be modelled down to the behaviour of a transistor). If we insist on jargon, this is actually a switch-level simulation.
I've looked at the 6502 simulator closely, but not the Atari simulator. In the 6502 simulator, the "transistor-level simulation" is simulating each transistor by moving "units of charge" around and treating the transistors as switches. So it's not an analog transistor simulation, but it's more than a logic simulation. The reason that the simulation needs to deal with charge levels rather than simply on vs off is there are places where, for instance, a large transistor will pull a line high and a small transistor pulls the line low, and the large transistor wins.
The whole point of the Visual6502 effort was to reverse engineer older processors by slicing up the die little by little and taking pictures of the die and using image recognition to convert them into transistor circuits. Then they simulate it accurate enough to be operational.
Since they are nonlinear devices, doing so is relatively expensive computationally.
If so, I'd be interested to learn the rationale for it. I would expect (and could be wrong) that an Atari could be simulated at the logic level adequately.
From "13.1 Types of Simulation" from from Application-Specific Integrated Circuits available at http://iroi.seu.edu.cn/books/asics/Book2/CH13/CH13.1.htm
> Logic simulation or gate-level simulation can also be used to check the timing performance of an ASIC. In a gate-level simulator a logic gate or logic cell (NAND, NOR, and so on) is treated as a black box modeled by a function whose variables are the input signals. The function may also model the delay through the logic cell. Setting all the delays to unit value is the equivalent of functional simulation. If the timing simulation provided by a black-box model of a logic gate is not accurate enough, the next, more detailed, level of simulation is switch-level simulation which models transistors as switches—on or off. Switch-level simulation can provide more accurate timing predictions than gate-level simulation, but without the ability to use logic-cell delays as parameters of the models. The most accurate, but also the most complex and time-consuming, form of simulation is transistor-level simulation. A transistor-level simulator requires models of transistors, describing their nonlinear voltage and current characteristics.