Wow, 7 nanometer is incredible! I wonder how small they can get silicon / silicon-germanium based chips before we have to resort to other techniques such as light processors (since light can be closer and even cross each other without issue). 10 nanometers that they're introducing next year is also incredible, at least to me since I'm not a hardware engineer and can't imagine how difficult manufacturing these are.
Process names have little to do with actual feature sizes any more. I think 130nm was the last where the name had any correlation to the actual physical dimensions.
I could be wrong, but I think optical processors would have serious diffraction problems with a 7 nm feature size, since the wavelength of blue light is somewhere around 300 nm.
As far as fabrication, one problem is that obviously you aren't using visible light to etch features on your wafers. The x-rays must be fun to work with... Not to mention, your photoresist would have to resist x-rays. Getting x-ray-resisting photoresist on and off your wafer must be tricky. Since 7 nm is about the size of several atoms, your wafer probably needs to be almost perfectly pure, which can't be easy, either.
I had always gotten the impression that even if it they couldn't get as small the impact of less heat and the ability to cross beams could allow them to be denser. But like I said I don't really know what I'm talking about :)
III-V semiconductors like Gallium Arsenide have a high mobility and are probably tested right now in Research labs around the world for CMOS-transistors (it is already in use for something like solar panels). But there's always the problem of how to scale these things as well as silicon based manufacturing.
Further out is still some stuff like graphene or carbon nanotubes. Of course, the structure of the transistor itself might change, which could enable further downscaling. There's already been a switch from planar to Silicon-on-Insulator (e.g. GlobalFoundries, TSMC, Samsung(?)) and Intel has the TriGate (everybody else calls it FinFet).
One day we might see the natural evolution to the gate-all-around FET, which would be something akin to a silicon nanowire (note: planar has the gate on top, FinFET has gate on top, left, and right of the channel). However, there are huge roadblocks in manufacturing to solve. And this could really be an issue. We might very well be able to build at the 5nm node. But if we can't build them fast and cheap enough, noone's going to do it. Manufacturers are already triple-patterning and doing all kinds of voodoo just to keep up with Moore's law.
Good old silicon might actually stay a central part for a much, much longer time.
There's no one way forward. A lot of things might happen and it will only be decided once a company actually ships a new and viable technology.
Remember what Intel did with the FinFETs. It was the same discussion then (What could the next thing be? III-V, SOI, blabla?). At one point, Intel simply came on stage, surprised us with FinFETs and everybody was like: "I guess it's FinFET, then." The idea of FinFETs is actually from the 90s or so. The sole reason why noone did it before is because noone could actually build them at scale (AFAIK, Intel is still the only company that ships FinFETs).
Keep in mind that manufacturing is very hard. It is very unlikely that there will be more than incremental steps. Just changing the channel material is already quite the task.
Also, don't believe any "This is the next transistor!" stuff. You can find these things a lot but they rarely mean more than some department trying to make a bit of publicity.
SOI is better than the planar design since you can fully deplete the channel. But it's worse than FinFETs when you consider the control of the gate on the channel and when it comes to thermals. The oxide below the channel also acts as a thermal isolator. So the heat can't be transported away as efficiently.
The upside of SOI is that it's easier to manufacture. That's why we see so much of it around (AFAIK, GlobalFoundries and TSMC still do it).
But the actual way forward is the FinFET. The 7nm chip from the article is actually built with FinFETs. Otherwise that thing would probably not work very well.
Hehe, yeah I was just reading a magazine this morning talking about it's the next big material in cycling for everything from strengthening carbon fiber parts to conduct electricity to replace cables used for shifting/brakes to hearth rate monitoring clothing etc...
The only real reason to switch to carbon chips is noise reduction at the 4nm node (if we ever go that far, we're getting into Long X-Rays at that point for lithography).
Also 4nm node will only be ~16-18 carbon atoms wide.
Diamond has the interesting property of having it's conduction band above vacuum level, so that free electrons would (in principle) fall out of the material. (Surface physics gets in the way of that.)
It's the reason that diamond is used for cold-cathode emitters btw.
