This seems like an interesting development, but the performance gain appears to be limited to low value inductors in the 10's of GHz range. Those inductors are already very small and easily integrated on RF ICs.
If you want to miniaturize electronics you need to miniaturize the inductors used in power conversion, which typically operate in the KHz to low MHz range. It's a very different problem.
Its a material that basically gives electrons "inertia" which acts like an inductance derived from magnetic fields. There is a time constant to it, which determines at what frequency range it starts contributing to the inductance value.
To make it useful for power electronics they would have to push out this time constant by at least 4 orders of magnitude, I don't believe the theoretical material properties support that.
You might see this shaving off a few mm^2 from RF ICs and providing better RF performance. Applications in power electronics, where inductors take up the most volume, seems unlikely.
On the flipside, kinetic inductance detectors (https://en.wikipedia.org/wiki/Kinetic_inductance_detector) for astronomy have been around since ~2000 and in the low light single photon regime they have much less noise on readout than photoelectric detectors (CCD/CMOS/etc).
The abstract [1] states that the technique is "purely material-enabled" but that they still laid out their kinetic inductor in a spiral. It would seem to me that a big advantage for these inductors in RF chips would be the lack of coupling to and from external magnetic fields if you used another layout.
One of the major limitations of existing planar spiral inductors is that their external magnetic fields will couple them to other nearby inductors creating a transformer. The big space saving for these could be the ability to lay down snake shaped inductors next to each other with very low coupling. Do they mention this in the article?
> If you want to miniaturize electronics you need to miniaturize the inductors used in power conversion
Hasn't that problem mostly been solved already with switch mode power supplies that are pretty small.
With most personal electronics being battery powered these days I'm curious where you see a real need for further reduction in the size of power converters. In other words what technologies or devices are currently limited by the size of their power converters ?
> Hasn't that problem mostly been solved already with switch mode power supplies that are pretty small.
I waste a ton of board space with power supplies. Not everything is personal electronics with custom ICs* in the volume of an iPhone. So this means on my current design there's power supplies for 1v, 1v8, 2v5, 3v3, ~4v, 5v. Each of these the biggest component is the inductor.
I've sometimes joked, I make power supplies with a computer attached.
Edit: since the volume is low we use off the shelf parts which means we tend to end up with a variety of voltage requirements. And yes...reduction of rails is something that's part of components selection, alas....
Are all of those drawing significant current though ? If you just have some small component with an odd voltage requirement that doesn't need much current couldn't you supply it with something a lot simpler than a dc-dc converter, like maybe a voltage divider or linear regulator ?
> Hasn't that problem mostly been solved already with switch mode power supplies that are pretty small.
Perhaps you are thinking of "wall wart" power supplies that used line-frequency transformers in their rectifier design. These have been replaced and miniaturized by using offline switched-mode power supplies and point-of-load converters, but the magnetic components remain the largest components in these designs.
> With most personal electronics being battery powered these days I'm curious where you see a real need for further reduction in the size of power converters.
It's now common for modern SoC devices to require multiple voltage rails. It may require 3.3 V, 1.35 V, 1.8 V on separate pins and each requires a point-of-load converter for efficiency, and each of these take up board space.
“Hasn't that problem mostly been solved already with switch mode power supplies that are pretty small“
It would still be useful to make them even smaller. For example, it’s often not possible to use all sockets in a power strip because of the size of power converters. Also, such smaller converters typically are a bit of a hassle to toss into a bag because of their somewhat awkward shape (especially if all other things in the bag are pencil-shoes or flat slates (laptop, tablet, notebook)
A transformer that fits inside an AC power plug would solve both problems.
I think that, _if_ we could build that, most people would start calling the current tiny converters bulky.
It would be useful to have lower profile inductors. It's difficult to get inductors less than 1mm high for use with low voltage boost/buck converters. ICs and other passive components can usually sit significantly less high above the board.
Yes I think the focus is on RFICs where these take up a lot of die area. Potentially that's really important for more exotic processes like InP, GaN, or even diamond, where wafer space comes at a huge premium.
At those frequencies you're going to be losing a lot of power in the switching losses of the transistors. Power MOSFETS have very low leakage when fully on or off, the largest loss tends to be during the transition when voltage and current are non zero. Because the speed of that transition is limited, the higher the frequency the more percentage of total time is spent in those transition phases and the higher the losses.
It's definitely a great development, but I don't understand the "trillion dollar" comment at the beginning. Near as I can tell, inductors are about a $4-5 billion dollar market [0]
I know it will help miniaturization, but it seems like devices most desirable for miniaturization are already most limited by other conditions like the battery in smart phones and laptops. Larger inductors seem to appear mostly in things like power supplies-- sure we'd like smaller power bricks, but I don't understand how it translates to trillions of dollars.
This will be a bigger deal when they get better effective carrier mass. It reads like intercalating more boron, or maybe a better choice or mix of elements, will yield increasingly better results. 50% is a big enough initial effect to be very encouraging. It is not clear from the article if there is any theoretical upper limit.
In the meantime, making the biggest part of a circuit
33% smaller might make the whole circuit almost that much smaller.
The value of these things is greatest manipulating signals at very high frequencies, far out of reach of digital signal processing. It is probably not notably useful for power conversion, where the exchange of energy via actual magnetic fields is what does the useful work.
So many hyperbolic claims that boil down to a moderate 33% area benefit with very little data about mundane things like long-term reliability, or process variation.
Every time an article mentions some buzzword like 'graphene', it turns out to be just a load of baloney. Graphene can do everything but leave the lab.
I think graphene gets a bad rap because it's had a very slow ramp up time due to chicken/egg problems in production cost/demand curves, but that's been changing drastically over the last decade. It's come down in cost by multiple orders of magnitude [0] While total sales have been modestly increasing, with projections for massive growth [1] and if there's a steady market cap while marginal costs decrease that much, also means orders of magnitude increases in shipped product.
It's had a lot of growing pains, but we seem to mostly have passed the inflection point in terms of market viability.
20-30 years really. The introduction of chip inductors, the last really significant reduction in size for commodity discrete inductors, happened in the 90s.
The article indicates a 50% reduction in area for a given inductance (last figure). These are planar spiral type inductors found on RFICs, which they're saying take up potentially 50% of the die area. So overall pretty impactful if you can lop off 25% of your die area.
Some of all. Inductors are particularly difficult to accommodate in contemporary circuits, so a general reduction in size could have an outsized impact.
Well, it's a register wall, not a pay wall. Agree it's annoying. The real annoying part to me is that Google seems to treat it the same as freely available no-registration content.
This seems like an interesting development, but the performance gain appears to be limited to low value inductors in the 10's of GHz range. Those inductors are already very small and easily integrated on RF ICs.
If you want to miniaturize electronics you need to miniaturize the inductors used in power conversion, which typically operate in the KHz to low MHz range. It's a very different problem.