We really need more of this. There's such a great ecosystem and community around software development and education, but IC design is at least a decade of not two behind in this regard.
Unfortunately, the open source tools are also decades behind. They're really only practical for small designs on the couple of open source PDKs that exist (and those seem more like abandoned PR projects than serious commitments to open hardware design).
Related, I thought this post was actually this video, which is tongue in cheek but a pretty good explanation of silicon manufacturing nonetheless: https://youtu.be/vuvckBQ1bME
Been doing IC design professionally since 2010. Happy to answer any questions.
Couldn't agree more. And Pat Deegan's YT channel [1] is such a gem. His last few videos covering asic design toolchain, Kicad 8, and FPGA design are excellent.
It's really exciting what's going on with things like Tiny Tapeout/Efabless/ChipIgnite and whatever Google is sponsoring - I have a hard time keeping the players straight - as far as education and ambitious hobbyist use. You never know what will come from small designs, either.
That said, despite what some ASIC houses will tell you, I haven't seen the costs narrowing on commercial ASIC design to the point that realizing an SoC would be a substantial cost savings on an aggressively cost-optimized microcontroller-based design or IoT design. Being able to do a commercially viable small-to-medium-sized ASIC for a design that ships, say, less than 2M/year, would change a lot of things. It would be very interesting if that were the case in 5-10 years - what do you see from the IC design perspective?
For me, it was exciting, but now it's disappointing. The SkyWorks 130nm that TinyTapeout uses is ancient; they didn't really give away anything of value. The repository for that and the 90nm PDK haven't been touched in over a year. As I said, it's not substantial enough for me to think it's anything more than a PR stunt.
Agreed. Custom design is still prohibitively expensive, and most often not needed. That being said, older process nodes are getting cheaper to the point where the manufacturing cost is feasible. The problem remains EDA tooling, which may very well be the majority of the cost. Without more competition in that space, I don't see Cadence/Synopsys/Siemens bringing their prices down any time soon.
I think the point is to incentivize development of (open) software and educational content for chip design and verification, while keeping costs low. Once people have the skills to do this, and there is enough demand, then it would make sense to allow manufacture of chips with better feature sizes.
Besides 130 nm is plenty good for a lot of industrial applications.
> That being said, older process nodes are getting cheaper to the point where the manufacturing cost is feasible.
The older nodes have been cheap enough for quite a while now. Folks like Xfab have nodes where you can generate chips for about the same price as you can an injection mold.
Hadn't heard of Xfab. Very cool! By older nodes I meant like 28nm or 40nm. Looks like their smallest is currently 0.18 and that nodes been around since before I was even in school! It's definitely still useful for some applications, but not very competitive in my areas.
180nm and bigger is just fine for a lot of things--especially analog or MEMS.
Lots of guitar pedals would be interesting and they can use old school 1um+ technologies that tolerate +-9V. Low power stuff actually likes larger transistors as they have much smaller leakage.
There's lots of interesting stuff to do if you can sink the NRE. The problem is that the super expensive CAD tools don't let you amortize something that isn't a million+ units.
130nm is 1800€/mm^2 from global foundries. You need to order at least 10mm^2 meaning it costs 18000€ for 100 chips. 28nm will cost you at least 10000€ per mm^2. You get more transistors per dollar but the quantity of chips is the same.
I do mixed-signal, which is mostly transistor-level design (analog), but also a lot of digital - both transistor-/gate-level and RTL.
I've mainly worked on RF transceivers for cellular, but eventually focused on ADC (analog to digital converters) IP that went into a variety of applications.
Pay depends on a lot of things - experience, type of circuit design, company, geography, etc. I've found that hardware engineer salaries on levels.fyi seem pretty accurate. IEEE also does a salary survey that you can pay to access for really detailed searches. You're definitely looking at starting salaries in 6 figures, and it's competitive with, but still below software engineers.
At small scales, I don't think it's profitable to do your own chip design. Many companies who start are just looking to get acquired rather than really sell their own chips.
Not really familiar with FPGA offerings sorry! It's a growing hobbyist area, though, so I'm sure you can find a lot of information on social media, youtube, etc.
1. Do smaller factories typically use pre-fabricated <100> p-wafers with a FET gate-layer for CMOS?
2. Also, is it normal to see circular thickness defects over +-200nm where a wafer vacuum-chuck was obviously set during double-sided polishing? The deformed synthetic sapphire wafers are ruining my fun.
In your opinion, other than for funsies, what would be a good situation for an open source project to pursue a custom IC vs say an FPGA or making due with a commercially available IC?
I think the only reason to do a custom IC, for now, is if you can't achieve your performance, power, area or price targets with FPGAs, microcontrollers, or other discrete components. It's still impractically expensive unless your volumes are enormous or your margins are very high. Even with a reasonable complex feature set, I think you can do better with individual components. You can get relatively cheap ARM cores, FPGAs, DSPs, microcontrollers, etc. I don't often see companies doing custom ICs for internal use.
That being said, I think the economies are changing. If you don't need a cutting edge process, the tapeout costs continue to come down. The problem that remains, though, is licensing cost of EDA tooling. There is a little bit of competition in that space, but not much. It is growing though, so hopefully that brings prices down.
You mentioned the cost of tools a couple of times. What's wrong with using MOSIS, which is free? Just asking, since I don't know anything about this area except that MOSIS was mentioned multiple times when I was in grad school back in the 1980s.
MOSIS is a fabrication service. The tools are totally separate, and you'd still have to pay to use them. Universities generally get free licenses though.
The thing is, with every chip generation the non recurring engineering costs are heavily swinging towards FPGAs staying competitive at ever higher volumes. If you're happy with a CPU+FPGA combo and want to take advantage of 12 nm but your design fits on an FPGA, then it almost never makes sense to design an ASIC.
Your design would in principle have to be an analog design or something that simply cannot take advantage of smaller nodes i.e. MEMS.
Yeah I think it will always be that way though because there's no real reason for hobbyists to design a custom IC - anything they can afford to get manufactured could be done on an FPGA.
Still, even the open source FPGA tooling is very far behind the commercial software, and there is a reason for hobbyists to use FPGAs. I really hope it improves eventually.
I'm not very hopeful though. My experience of switching from the software industry to the hardware industry has shown me that most hardware people are just really bad at software and also don't really care about it. (Which is kind of weird because hardware design is really just programming for an unusual target platform.)
The fact that Verilator exists and mostly works is a big outlier.
Agreed. There's a great episode on the Microarch Club podcast (#10) about open source tooling and Verilator specifically. While Verilator is in an impressive state, it doesn't get any use by the big players.
What would be the best way to get into ic design (aside from college). Any suggestions on how to go from beginner to your level (Or maybe just share your path)?
Professionally? Don't think there's a realistic path aside from college. EE undergrad (or possible CSE if you're interested in digital design) and these days an MS too. Otherwise, finding free information online. Many MIT and Stanford courses are available online, and there are some YouTube videos too.
Unfortunately, the open source tools are also decades behind. They're really only practical for small designs on the couple of open source PDKs that exist (and those seem more like abandoned PR projects than serious commitments to open hardware design).
Related, I thought this post was actually this video, which is tongue in cheek but a pretty good explanation of silicon manufacturing nonetheless: https://youtu.be/vuvckBQ1bME
Been doing IC design professionally since 2010. Happy to answer any questions.